H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 203
![no-image](/images/no-image-200.jpg)
H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 203 of 1025
- Download datasheet (6Mb)
6.5.10
With DRAM, in addition to full access (normal access) in which data is accessed by outputting a
row address for each access, a fast page mode is also provided which can be used when making a
number of consecutive accesses to the same row address. This mode enables fast (burst) access of
data by simply changing the column address after the row address has been output. Burst access
can be selected by setting the BE bit in MCR to 1.
Burst Operation
(Address shift size set to 9 bits)
Figure 6.19 Example of 2-CAS System Connection
H8S/2350
HWR (WE)
CS (RAS)
D
15
LCAS
to D
CAS
A
A
A
A
A
A
A
A
A
9
8
7
6
5
4
3
2
1
0
Rev. 3.00 Sep 15, 2006 page 169 of 988
256-kbyte
RAS
UCAS
LCAS
WE
A
A
A
A
A
A
A
A
A
D
8
7
6
5
4
3
2
1
0
15
2-CAS type 4-Mbit DRAM
to D
9-bit column address
0
Low address
input: A
Column address
input: A
16-bit configuration
OE
8
8
Section 6 Bus Controller
to A
to A
0
0
REJ09B0330-0300
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