H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 650
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 650 of 1025
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Section 14 Smart Card Interface
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used together with the SDIR bit for communication with an inverse convention card.
The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,
see section 14.3.4, Register Settings.
Bit 1—Reserved: Read-only bit, always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the Smart Card interface
function.
14.2.2
Note:
Bit 4 of SSR has a different function in Smart Card interface mode. Coupled with this, the setting
conditions for bit 2, TEND, are also different.
Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 13.2.7, Serial
Status Register (SSR).
Rev. 3.00 Sep 15, 2006 page 616 of 988
REJ09B0330-0300
Bit 2
SINV
0
1
Bit 0
SMIF
0
1
Bit
Initial value :
R/W
* Only 0 can be written to bits 7 to 3, to clear these flags.
Serial Status Register (SSR)
Description
TDR contents are transmitted as they are
Receive data is stored as it is in RDR
TDR contents are inverted before being transmitted
Receive data is stored in inverted form in RDR
Description
Smart Card interface function is disabled
Smart Card interface function is enabled
:
:
R/(W) *
TDRE
7
1
R/(W) *
RDRF
6
0
R/(W) *
ORER
5
0
R/(W) *
ERS
4
0
R/(W) *
PER
3
0
TEND
R
2
1
MPB
R
1
0
(Initial value)
(Initial value)
MPBT
R/W
0
0
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