H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 171

no-image

H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit 4—2-CAS Method Select (CW2): Write 1 to this bit when areas 2 to 5 are designated as 8-bit
DRAM space, and 0 otherwise.
Bits 3 and 2—Multiplex Shift Count 1 and 0 (MXC1, MXC0): These bits select the size of the
shift to the lower half of the row address in row address/column address multiplexing for the
DRAM interface. In burst operation on the DRAM interface, these bits also select the row address
to be used for comparison.
Bit 5
RCDM
0
1
Bit 4
CW2
0
1
Bit 3
MXC1
0
1
Description
DRAM interface: RAS up mode selected
DRAM interface: RAS down mode selected
Description
16-bit DRAM space selected
8-bit DRAM space selected
Bit 2
MXC0
0
1
0
1
Description
8-bit shift
9-bit shift
10-bit shift
When 8-bit access space is designated: Row address A
for comparison
When 16-bit access space is designated: Row address A
for comparison
When 8-bit access space is designated: Row address A
for comparison
When 16-bit access space is designated: Row address A
for comparison
for comparison
When 16-bit access space is designated: Row address A
for comparison
When 8-bit access space is designated: Row address A
Rev. 3.00 Sep 15, 2006 page 137 of 988
Section 6 Bus Controller
REJ09B0330-0300
23
23
23
23
23
(Initial value)
(Initial value)
23
(Initial value)
to A
to A
to A
to A
to A
to A
8
9
10
10
11
9
used
used
used
used
used
used

Related parts for H8S-2350