H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 93
H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
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2.8
2.8.1
The CPU has five main processing states: the reset state, exception handling state, program
execution state, bus-released state, and power-down state. Figure 2.14 shows a diagram of the
processing states. Figure 2.15 indicates the state transitions.
Note: * The power-down state also includes a medium-speed mode, module stop mode etc.
Processing
states
Processing States
Overview
Exception-handling
Program execution
Bus-released state
Power-down state
The CPU and all on-chip supporting modules have been
initialized and are stopped.
A transient state in which the CPU changes the normal
processing flow in response to a reset, interrupt, or trap
instruction.
The CPU executes program instructions in sequence.
The external bus has been released in response to a bus
request signal from a bus master other than the CPU.
CPU operation is stopped
to conserve power.*
Figure 2.14 Processing States
Reset state
state
state
Rev. 3.00 Sep 15, 2006 page 59 of 988
Hardware standby
Software standby
Sleep mode
mode
mode
REJ09B0330-0300
Section 2 CPU
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