H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 375
![no-image](/images/no-image-200.jpg)
H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 375 of 1025
- Download datasheet (6Mb)
Port 2 Data Direction Register (P2DDR)
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read.
Setting a P2DDR bit to 1 makes the corresponding port 2 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P2DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode. As the PPG and TPU are initialized
by a manual reset, the pin states are determined by the P2DDR and P2DR specifications.
Port 2 Data Register (P2DR)
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P2
P2DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Bit
Initial value
R/W
Bit
Initial value
R/W
:
:
:
:
:
:
P27DDR
P27DR
R/W
7
0
W
7
0
P26DDR
P26DR
R/W
W
6
0
6
0
P25DDR
P25DR
R/W
W
5
0
5
0
P24DDR
P24DR
R/W
W
4
0
4
0
Rev. 3.00 Sep 15, 2006 page 341 of 988
P23DDR
P23DR
R/W
W
3
0
3
0
P22DDR
P22DR
R/W
W
2
0
2
0
P21DDR
P21DR
Section 9 I/O Ports
REJ09B0330-0300
R/W
W
1
0
1
0
P20DDR
7
P20DR
to P2
R/W
W
0
0
0
0
0
).
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