H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 881
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
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MCR—Memory Control Register
Bit
Initial value
Read/Write
:
:
:
TP Cycle Control
0
1
TPC
R/W
7
0
1-state precharge cycle is inserted
2-state precharge cycle is inserted
Burst Access Enable
R/W
0
1
BE
6
0
Burst disabled (always full access)
For DRAM space access, access in fast page mode
RCDM
RAS/CS Down Mode
R/W
5
0
0
1
DRAM interface: RAS up mode selected
DRAM interface: RAS down mode selected
2-CAS Method Select
CW2
0
1
R/W
4
0
16-bit DRAM space selected
8-bit DRAM space selected
MXC1
Multiplex Shift Count
R/W
3
0
0
1
H'FED6
0
1
0
1
Rev. 3.00 Sep 15, 2006 page 847 of 988
MXC0
R/W
2
0
8-bit shift
9-bit shift
10-bit shift
—
Appendix B Internal I/O Register
RLW1
R/W
Refresh Cycle Wait Control
1
0
0
1
0
1
0
1
RLW0
R/W
0
0
No wait state inserted
1 wait state inserted
2 wait states inserted
3 wait states inserted
REJ09B0330-0300
Bus Controller
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