H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 236

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
7.2.1
MAR is a 32-bit readable/writable register that specifies the transfer source address or destination
address.
The upper 8 bits of MAR are reserved: they are always read as 0, and cannot be modified.
Whether MAR functions as the source address register or as the destination address register can be
selected by means of the DTDIR bit in DMACR.
MAR is incremented or decremented each time a byte or word transfer is executed, so that the
address specified by MAR is constantly updated. For details, see section 7.2.4, DMA Control
Register (DMACR).
MAR is not initialized by a reset or in standby mode.
Rev. 3.00 Sep 15, 2006 page 202 of 988
REJ09B0330-0300
Bit
MAR
Initial value
R/W
Bit
MAR
Initial value
R/W
Memory Address Registers (MAR)
:
:
:
:
:
:
:
:
R/W
31
15
—
—
0
*
R/W
30
14
—
—
0
*
R/W
29
13
—
—
0
*
R/W
28
12
—
—
0
*
R/W
27
11
—
—
0
*
R/W
26
10
—
—
0
*
R/W
25
—
—
0
9
*
R/W
24
—
—
0
8
*
R/W
R/W
23
*
7
*
R/W
R/W
22
6
*
*
R/W
R/W
21
*
5
*
R/W
R/W
20
4
*
*
R/W
R/W
19
*
3
*
R/W
R/W
18
2
*
*
*: Undefined
R/W
R/W
17
1
*
*
R/W
R/W
16
*
0
*