H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 857
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 857 of 1025
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TSR3—Timer Status Register 3
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
—
—
7
1
—
—
6
1
—
—
5
0
Overflow Flag
R/(W) *
TCFV
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
R/(W) *
Input Capture/Output Compare Flag D
TGFD
0
1
3
0
[Setting conditions]
[Clearing conditions]
• When DTC is activated by TGID interrupt while DISEL bit of MRB in DTC
• When 0 is written to TGFD after reading TGFD = 1
• When TCNT = TGRD while TGRD is functioning as output compare register
• When TCNT value is transferred to TGRD by input capture signal while
Input Capture/Output Compare Flag C
is 0
TGRD is functioning as input capture register
0
1
R/(W) *
TGFC
2
0
[Clearing conditions]
• When DTC is activated by TGIC interrupt while DISEL bit of MRB in
• When 0 is written to TGFC after reading TGFC = 1
[Setting conditions]
• When TCNT = TGRC while TGRC is functioning as output compare
• When TCNT value is transferred to TGRC by input capture signal
DTC is 0
register
while TGRC is functioning as input capture register
R/(W) *
Input Capture/Output Compare Flag B
TGFB
0
1 [Setting conditions]
1
0
H'FE85
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL bit
• When 0 is written to TGFB after reading TGFB = 1
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
Rev. 3.00 Sep 15, 2006 page 823 of 988
of MRB in DTC is 0
output compare register
capture signal while TGRB is functioning as input capture
register
R/(W) *
Input Capture/Output Compare Flag A
TGFA
0
1
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT=TGRA while TGRA is function-
• When TCNT value is transferred to TGRA by
DISEL bit of MRB in DTC is 0
DTA bit of DMABCR in DMAC is 1
ing as output compare register
input capture signal while TGRA is functioning as
input capture register
Appendix B Internal I/O Register
REJ09B0330-0300
TPU3
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