S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 262

• Manufacturer Part Number: S9S12P32J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 32K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P32J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

Freescale’s Scalable Controller Area Network (S12MSCANV3)
1. In this case, PHASE_SEG1 must be at least 2 time quanta (Tq).
The bit time is determined by the oscillator frequency, the baud rate prescaler, and the number of time
quanta (Tq) clock cycles per bit (as shown in
8.3.2.5
A flag can be cleared only by software (writing a 1 to the corresponding bit position) when the condition
which caused the setting is no longer valid. Every flag has an associated interrupt enable bit in the
CANRIER register.
262
1. This setting is not valid. Please refer to
MSCAN Receiver Flag Register (CANRFLG)
TSEG13
Bit Time
1. This setting is not valid. Please refer to
0
0
0
0
1
1
:
TSEG22
0
0
1
1
:
=
TSEG12
(
----------------------------------------------------- -
Prescaler value
0
0
0
0
1
1
:
S12P-Family Reference Manual, Rev. 1.13
f CANCLK
TSEG21
Table 8-10. Time Segment 1 Values
Table 8-9. Time Segment 2 Values
0
0
1
1
:
TSEG11
0
0
1
1
1
1
:
Table 8-9
Table 8-37
TSEG20
)
•
Table 8-37
0
1
0
1
:
(
1
TSEG10
+
and
for valid settings.
TimeSegment1
0
1
0
1
0
1
:
Table
for valid settings.
8-10).
1 Tq clock cycle
Time Segment 2
2 Tq clock cycles
7 Tq clock cycles
8 Tq clock cycles
1 Tq clock cycle
15 Tq clock cycles
16 Tq clock cycles
2 Tq clock cycles
3 Tq clock cycles
Time segment 1
4 Tq clock cycles
:
+
TimeSegment2
:
(1)
(1)
Freescale Semiconductor
1
1
)
Eqn. 8-1