S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 341

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S9S12P32J0VFTR

Manufacturer Part Number
S9S12P32J0VFTR
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P32J0VFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
Read: anytime
Write: anytime
There are three control bits for concatenation, each of which is used to concatenate a pair of PWM
channels into one 16-bit channel. When channels 4 and 5 are concatenated, channel 4 registers become the
high-order bytes of the double-byte channel. When channels 2 and 3 are concatenated, channel 2 registers
become the high-order bytes of the double-byte channel. When channels 0 and 1 are concatenated,
channel 0 registers become the high-order bytes of the double-byte channel.
Reference
PWM function.
Freescale Semiconductor
Module Base + 0x0005
Reset
W
R
Section 10.4.2.7, “PWM 16-Bit Functions,”
0
0
7
Change these bits only when both corresponding channels are disabled.
= Unimplemented or Reserved
CON45
0
6
Figure 10-8. PWM Control Register (PWMCTL)
S12P-Family Reference Manual, Rev. 1.13
CON23
0
5
CON01
NOTE
0
4
for a more detailed description of the concatenation
PSWAI
Pulse-Width Modulator (PWM8B6CV1) Block Description
0
3
PFRZ
0
2
0
0
1
0
0
0
341

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