S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 465

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S9S12P32J0VFTR

Manufacturer Part Number
S9S12P32J0VFTR
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P32J0VFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
13.4.5.13 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of the P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set Field Margin Level command, the Memory Controller will set the
field margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set Field Margin Level command are defined in
Freescale Semiconductor
Register
FSTAT
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
CCOBIX[2:0]
When the D-Flash block is targeted, the D-Flash field margin levels are
applied only to the D-Flash reads. However, when the P-Flash block is
targeted, the P-Flash field margin levels are applied to both P-Flash and D-
Flash reads. It is not possible to apply field margin levels to the P-Flash
block only.
Table 13-56. Set Field Margin Level Command FCCOB Requirements
000
001
MGSTAT1
MGSTAT0
ACCERR
Table 13-55. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
S12P-Family Reference Manual, Rev. 1.13
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
0x0E
NOTE
NOTE
FCCOB Parameters
Margin level setting
Global address [17:16] to identify the Flash
Error Condition
128 KByte Flash Module (S12FTMRC128K1V1)
block
Table
13-27)
Table
13-57.
465

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