S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 81

• Manufacturer Part Number: S9S12P32J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 32K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P32J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

1. Read: Always reads 0x00
1. Read: Anytime. The data source is depending on the data direction value.
2.3.31
2.3.32
Freescale Semiconductor
Function
Address 0x024F
Address 0x0250
Write: Unimplemented
Write: Anytime
Altern.
Field
PTM
PTM
Reset
Reset
5
4
W
W
R
R
Port M general purpose input/output data—Data Register, SPI SCK input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, SPI MOSI input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI function takes precedence over the general purpose I/O function if enabled.
• The SPI function takes precedence over the general purpose I/O function if enabled.
PIM Reserved Register
Port M Data Register (PTM)
—
0
0
0
0
7
7
= Unimplemented or Reserved
—
0
0
0
0
6
6
Table 2-28. PTM Register Field Descriptions
Figure 2-30. Port M Data Register (PTM)
S12P-Family Reference Manual, Rev. 1.13
Figure 2-29. PIM Reserved Register
PTM5
SCK
5
0
0
5
0
PTM4
MOSI
0
0
0
4
4
Description
u = Unaffected by reset
PTM3
SS
0
0
0
3
3
PTM2
MISO
0
0
0
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
TXCAN
PTM1
0
0
0
1
1
Access: User read
RXCAN
PTM0
0
0
0
0
0
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