S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 340

• Manufacturer Part Number: S9S12P32J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 32K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P32J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

Pulse-Width Modulator (PWM8B6CV1) Block Description
Read: anytime
Write: anytime
10.3.2.6
The PWMCTL register provides for various control of the PWM module.
340
Module Base + 0x0004
Reset
CAE5
CAE4
CAE3
CAE2
CAE1
CAE0
Field
5
4
3
2
1
0
W
R
Center Aligned Output Mode on Channel 5
0 Channel 5 operates in left aligned output mode.
1 Channel 5 operates in center aligned output mode.
Center Aligned Output Mode on Channel 4
0 Channel 4 operates in left aligned output mode.
1 Channel 4 operates in center aligned output mode.
Center Aligned Output Mode on Channel 3
1 Channel 3 operates in left aligned output mode.
1 Channel 3 operates in center aligned output mode.
Center Aligned Output Mode on Channel 2
0 Channel 2 operates in left aligned output mode.
1 Channel 2 operates in center aligned output mode.
Center Aligned Output Mode on Channel 1
0 Channel 1 operates in left aligned output mode.
1 Channel 1 operates in center aligned output mode.
Center Aligned Output Mode on Channel 0
0 Channel 0 operates in left aligned output mode.
1 Channel 0 operates in center aligned output mode.
PWM Control Register (PWMCTL)
0
0
7
Write these bits only when the corresponding channel is disabled.
= Unimplemented or Reserved
Figure 10-7. PWM Center Align Enable Register (PWMCAE)
0
0
6
Table 10-8. PWMCAE Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
CAE5
0
5
CAE4
NOTE
0
4
Description
CAE3
0
3
CAE2
0
2
Freescale Semiconductor
CAE1
0
1
CAE0
0
0