S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 267

• Manufacturer Part Number: S9S12P32J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 32K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P32J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

1. Read: Anytime
8.3.2.9
The CANTARQ register allows abort request of queued messages as described below.
1. Read: Anytime
Freescale Semiconductor
Module Base + 0x0008
ABTRQ[2:0]
TXEIE[2:0]
Write: Anytime when not in initialization mode
Write: Anytime when not in initialization mode
Field
Field
2-0
2-0
Reset:
W
R
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
Abort Request — The CPU sets the ABTRQx bit to request that a scheduled message buffer (TXEx = 0) be
aborted. The MSCAN grants the request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a message is aborted, the associated TXE (see
Section 8.3.2.7, “MSCAN Transmitter Flag Register
Section 8.3.2.10, “MSCAN Transmitter Message Abort Acknowledge Register
transmit interrupt occurs if enabled. The CPU cannot reset ABTRQx. ABTRQx is reset whenever the associated
TXE flag is set.
0 No abort request
1 Abort request pending
MSCAN Transmitter Message Abort Request Register (CANTARQ)
Figure 8-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
request.
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
= Unimplemented
Table 8-15. CANTARQ Register Field Descriptions
Table 8-14. CANTIER Register Field Descriptions
0
0
6
S12P-Family Reference Manual, Rev. 1.13
0
0
5
NOTE
NOTE
0
0
4
Description
Description
(CANTFLG)”) and abort acknowledge flags (ABTAK, see
Freescale’s Scalable Controller Area Network (S12MSCANV3)
3
0
0
ABTRQ2
0
2
(CANTAAK)”) are set and a
Access: User read/write
ABTRQ1
0
1
ABTRQ0
0
0
267
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