S9S12P32J0VFTR Freescale Semiconductor, S9S12P32J0VFTR Datasheet - Page 269
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S9S12P32J0VFTR
Manufacturer Part Number
S9S12P32J0VFTR
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of S9S12P32J0VFTR
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
- Current page: 269 of 566
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The following gives a short programming example of the usage of the CANTBSEL register:
To get the next available transmit buffer, application software must read the CANTFLG register and write
this value back into the CANTBSEL register. In this example Tx buffers TX1 and TX2 are available. The
value read from CANTFLG is therefore 0b0000_0110. When writing this value back to CANTBSEL, the
Tx buffer TX1 is selected in the CANTXFG because the lowest numbered bit set to 1 is at bit position 1.
Reading back this value out of CANTBSEL results in 0b0000_0010, because only the lowest numbered
bit position set to 1 is presented. This mechanism eases the application software the selection of the next
available Tx buffer.
If all transmit message buffers are deselected, no accesses are allowed to the CANTXFG registers.
8.3.2.12
The CANIDAC register is used for identifier acceptance control as described below.
1. Read: Anytime
Freescale Semiconductor
Module Base + 0x000B
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are read-only
TX[2:0]
Field
•
•
•
2-0
Reset:
LDAA CANTFLG; value read is 0b0000_0110
STAA CANTBSEL; value written is 0b0000_0110
LDAA CANTBSEL; value read is 0b0000_0010
W
R
Transmit Buffer Select — The lowest numbered bit places the respective transmit buffer in the CANTXFG
register space (e.g., TX1 = 1 and TX0 = 1 selects transmit buffer TX0; TX1 = 1 and TX0 = 0 selects transmit
buffer TX1). Read and write accesses to the selected transmit buffer will be blocked, if the corresponding TXEx
bit is cleared and the buffer is scheduled for transmission (see
Register
0 The associated message buffer is deselected
1 The associated message buffer is selected, if lowest numbered bit
MSCAN Identifier Acceptance Control Register (CANIDAC)
The CANTBSEL register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK=1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
Figure 8-15. MSCAN Identifier Acceptance Control Register (CANIDAC)
(CANTFLG)”).
= Unimplemented
Table 8-17. CANTBSEL Register Field Descriptions
0
0
6
S12P-Family Reference Manual, Rev. 1.13
IDAM1
0
5
NOTE
IDAM0
0
4
Description
Freescale’s Scalable Controller Area Network (S12MSCANV3)
3
0
0
Section 8.3.2.7, “MSCAN Transmitter Flag
IDHIT2
0
2
Access: User read/write
IDHIT1
0
1
IDHIT0
0
0
269
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