DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 250

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Bit Count (BC[15:0]) – Lower 16 bits of 32 bits. Register description follows next register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Bit Count (BC[31:16]) - Upper 16 bits of 32 bits.
Bit Count (BC[31:0]) – These 32 bits indicate the number of bits in the incoming data stream. This count stops
incrementing when it reaches a count of FFFF FFFFh. This bit counter will not increment when an OOS condition
exists. This register is updated via the PMU signal (see Section 10.4.5).
BC15
BC31
BC23
BC7
15
15
0
7
0
0
7
0
BC14
BC30
BC22
BC6
14
14
0
6
0
0
6
0
BERT.RBCR1
BERT Receive Bit Count Register 1
(0,2,4,6)78h
BERT.RBCR2
BERT Receive Bit Count Register 2
(0,2,4,6)7Ah
BC13
BC29
BC21
BC5
13
13
0
5
0
0
5
0
BC12
BC28
BC20
BC4
12
12
0
0
0
0
4
4
250
BC11
BC27
BC19
BC3
11
11
0
3
0
0
3
0
BC10
BC26
BC18
BC2
10
10
0
2
0
0
2
0
BC25
BC17
BC9
BC1
9
0
1
0
9
0
1
0
BC24
BC16
BC8
BC0
8
0
0
0
8
0
0
0

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