DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 87

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.3.6
Figure 8-40
mode, the A[0]/BSWAP signal controls whether or not to byte swap. In 8-bit mode, the A[0]/BSWAP signal is used
as the LSB of the address bus (A[0]). The selection of databus size is determined by the WIDTH input signal. See
also Section 10.1.1.
Figure 8-40. 16-Bit Mode Write
Figure 8-41. 16-Bit Mode Read
Note: Address 0x2B0 = 0x1234
Note: Address 0x2B0 = 0x1234
A[0]/BSWAP
A[0]/BSWAP
A[10:1]
D[15:0]
A[10:1]
D[15:0]
Microprocessor Interface Functional Timing
RDY
RDY
CS
CS
WR
RD
WR
RD
and
Figure 8-42
Z
Z
0x2B0
0x1234
0x2B0
0x1234
shows examples of a 16-bit databus and an 8-bit databus, respectively. In 16-bit
Z
Z
87

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