DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 389

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 18-6. System Interface L3 Timing
(V
Note 1:
Note 2:
Note 3:
RSCLK and TSCLK
RSCLK and TSCLK
RSCLK and TSCLK
RADR and REN
RADR and REN
RDATA, RPRTY, RPXA,
RSOX, REOP, RVAL, RMOD,
and RERR
TDATA, TPRTY, TADR, TEN,
TSOX, TEOP, TMOD, and
TERR
TDATA, TPRTY, TADR, TEN,
TSOX, TEOP, TMOD, and
TERR
TPXA and TSPA
DD
= 3.3V ±5%, T
SIGNAL NAME(S)
The input/output timing reference level for all signals is V
Rise and fall times are measured at output side with the output unloaded. Rise time is measured from 20% to 80% V
is measured from 80% to 20% V
These times are met with a 30pF, 300 Ω load on the associated output pin.
j
= -40°C to +125°C.)
SYMBOL
OH
t2/t1
.
f1
t3
t5
t6
t7
t5
t6
t7
Clock frequency (1/t1) (Note 1)
Clock duty cycle (Note 1)
Rise/fall times (Notes 1, 2)
Hold time from RSCLK (Note 1)
Setup time to RSCLK (Note 1)
Delay from RSCLK (Notes 1, 3)
Hold time from TSCLK (Note 1)
Setup time to TSCLK (Note 1)
Delay from TSCLK (Notes 1, 3)
389
DD
DESCRIPTION
/2.
MIN
3.5
3.5
40
0
0
2
0
2
TYP
50
MAX
9.5
9.5
66
60
2
OH
. Fall time
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
%