DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 371

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Receive Errored Byte Count (REBC[15:0]) – Lower 16 bits of 32 bits. Register description follows
next register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Receive Errored Byte Count (REBC[31:16]) - Upper 16 bits of 32 bits.
Receive Errored Byte Count (REBC[31:0]) – These 32 bits indicate the number of bytes contained in packets
stored in the receive FIFO with an error indication. Note: Bytes discarded due to FCS extraction, system loopback,
FIFO reset, or an overflow condition may be included in this count. This register is updated via the PMU signal (see
Section 10.4.5).
REBC15
REBC31
REBC23
REBC7
15
15
0
7
0
0
7
0
REBC14
REBC30
REBC22
REBC6
14
14
0
6
0
0
6
0
PP.REBCR1
Packet Processor Receive Errored Byte Count Register 1
(1,3,5,7)ECh
PP.REBCR2
Packet Processor Receive Errored Byte Count Register 2
(1,3,5,7)EEh
REBC13
REBC29
REBC21
REBC5
13
13
0
5
0
0
5
0
REBC12
REBC28
REBC20
REBC4
12
12
0
0
0
0
4
4
371
REBC11
REBC27
REBC19
REBC3
11
11
0
3
0
0
3
0
REBC10
REBC26
REBC18
REBC2
10
10
0
2
0
0
2
0
REBC25
REBC17
REBC9
REBC1
9
0
1
0
9
0
1
0
REBC24
REBC16
REBC8
REBC0
8
0
0
0
8
0
0
0