DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 360

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Transmit Packet Count (TPC[15:0]) – Lower 16 bits of 24 bits. Register description follows next
register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Transmit Packet Count (TPC[23:16]) - Upper 8 bits of Register.
Transmit Packet Count (TPC[23:0]) – These 24 bits indicate the number of packets extracted from the Transmit
FIFO and output in the outgoing data stream. This register is updated via the PMU signal (see Section 10.4.5).
TPC15
TPC23
TPC7
15
15
—
0
7
0
0
7
0
TPC14
TPC22
TPC6
14
14
—
0
6
0
0
6
0
PP.TPCR1
Packet Processor Transmit Packet Count Register 1
(1,3,5,7)B4h
PP.TPCR2
Packet Processor Transmit Packet Count Register 2
(1,3,5,7)B6h
TPC13
TPC21
TPC5
13
13
—
0
5
0
0
5
0
TPC12
TPC20
TPC4
12
12
—
0
0
0
0
4
4
360
TPC11
TPC19
TPC3
11
11
—
0
3
0
0
3
0
TPC10
TPC18
TPC2
10
10
—
0
2
0
0
2
0
TPC17
TPC9
TPC1
—
9
0
1
0
9
0
1
0
TPC16
TPC8
TPC0
—
8
0
0
0
8
0
0
0