DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 1634

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Cycle-steal mode .................................... 410
D
Data transfer controller (DTC) ............... 171
Data transfer instructions.......................... 43
Dead time compensation ........................ 602
Deep software standby mode................ 1341
Direct memory access controller
(DMAC) ................................................. 383
Divider...................................................... 69
DMA transfer by peripheral modules ..... 421
DMA transfer requests............................ 399
DMA transfer types ................................ 406
DTC activation by interrupt.................... 210
DTC activation sources .......................... 184
DTC bus release timing .......................... 206
DTC execution status.............................. 204
DTC vector address ................................ 186
DTC/DMAC activation .......................... 607
Dual address mode.................................. 407
E
Error protection .................................... 1272
Exception handling ................................... 87
Exception handling state........................... 53
External clock input method..................... 83
External pulse width measurement......... 601
External request mode ............................ 399
External trigger input timing .................. 966
F
Features of instructions............................. 29
Fixed mode ............................................. 402
Flash memory ....................................... 1215
Flash memory configuration................. 1221
Flash memory emulation in RAM ........ 1274
Flow of the user break operation ............ 158
Rev. 3.00 May 17, 2007 Page 1576 of 1582
REJ09B0181-0300
Full-scale error........................................ 969
Function for detecting oscillator stop........ 84
G
General illegal instructions ....................... 98
General registers ....................................... 25
Global-base register (GBR) ...................... 26
H
Hardware protection ............................. 1271
I
I/O ports ................................................ 1161
I
I
Illegal slot instructions.............................. 98
Immediate data formats............................. 29
Influences on absolute accuracy ............. 972
Initial user branch processing time ....... 1281
Initial values of control register ................ 27
Initial values of general register................ 27
Initial values of system register ................ 27
Initiation intervals of user branch
processing ............................................. 1281
Instruction formats .................................... 35
Instruction set............................................ 39
Interrupt controller (INTC) ..................... 105
Interrupt exception handling
vector table.............................................. 123
Interrupt priority ....................................... 96
Interrupt response time ........................... 131
Interrupt sequence................................... 127
Interrupts................................................... 95
IRQ interrupts ......................................... 121
2
2
C bus format......................................... 920
C bus interface 2 (I
2
C2)........................ 901