DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 346

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
9.5.2
Basic Timing: For access to a normal space, this LSI uses strobe signal output in consideration of
the fact that mainly SRAM without a byte selection will be directly connected. When using
SRAM with a byte-selection pin, see section 9.5.8, SRAM Interface with Byte Selection. Figure
9.2 shows the basic timings of normal space access. A no-wait normal access is completed in two
cycles. The BS signal is asserted for one cycle to indicate the start of a bus cycle.
Rev. 3.00 May 17, 2007 Page 288 of 1582
REJ09B0181-0300
Normal Space Interface
Figure 9.2 Normal Space Basic Access Timing (Access Wait 0)
Note: * The waveform for DACKn is when active low is specified.
Write
Read
D31 to D0
D31 to D0
A29 to A0
DACKn
RDWR
RDWR
WRxx
CSn
RD
CK
BS
*
T1
T2