DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 852

IC SUPERH MCU FLASH 112LQFP

DF70844AD80FPV

Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70844AD80FPV

Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF70844AD80FPV
Quantity:
5 000
Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.4
SCFTDR is a 16-stage 8-bit FIFO register that stores data for serial transmission. When the SCIF
detects that the transmit shift register (SCTSR) is empty, it moves transmit data written in the
SCFTDR into SCTSR and starts serial transmission. Continuous serial transmission is performed
until there is no transmit data left in SCFTDR. SCFTDR can always be written to by the CPU.
When SCFTDR is full of transmit data (16 bytes), no more data can be written. If writing of new
data is attempted, the data is ignored.
16.3.5
SCSMR is a 16-bit register that specifies the SCIF serial communication format and selects the
clock source for the baud rate generator.
The CPU can always read and write to SCSMR.
Initial value:
Rev. 3.00 May 17, 2007 Page 794 of 1582
REJ09B0181-0300
Bit
7 to 0
Bit
15 to 8
R/W:
Bit:
Transmit FIFO Data Register (SCFTDR)
Serial Mode Register (SCSMR)
15
R
0
Bit Name
-
Bit Name
14
R
0
-
13
Initial value:
R
0
-
Initial
value
Undefined W
Initial
value
All 0
R/W:
12
R
0
-
Bit:
11
W
R
0
7
-
-
R/W
R/W
R
10
W
R
0
6
-
-
Description
FIFO for transmits serial data
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
W
R
9
0
5
-
-
R
W
8
0
4
-
-
R/W
C/A
W
7
0
3
-
R/W
CHR
6
0
W
2
-
R/W
PE
5
0
W
1
-
R/W
O/E
4
0
W
0
-
STOP
R/W
3
0
R
2
0
-
R/W
1
0
CKS[1:0]
R/W
0
0

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