LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 263

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
Fig 31. Isochronous OUT endpoint operation example
W0
W1
W2
W3
W4
11.15.7 Auto Length Transfer Extraction (ATLE) mode operation
0x4
0x000A0010
0x80000035
0x60000010
-
0x0
W0
W1
W2
W3
W4
-
Some host drivers such as NDIS (Network Driver Interface Specification) host drivers are
capable of concatenating small USB transfers (delta transfers) to form a single large USB
transfer. For OUT USB transfers, the device hardware has to break up this concatenated
transfer back into the original delta transfers and transfer them to separate DMA buffers.
This is achieved by setting the DMA mode to Auto Transfer Length Extraction (ATLE)
mode in the DMA descriptor. ATLE mode is supported for Bulk endpoints only.
OUT transfers in ATLE mode
0x1
DMA_buffer_length
0
after 4 packets
Present_DMA_Count
0x000A
0x0
All information provided in this document is subject to legal disclaimers.
31
frame_ number Packet_Valid
Max_packet_size
Rev. 2 — 19 August 2010
Isocronous_packetsize_memory_address
21
22
23
24
0x0
ATLE settings
NA
packet size memory
16
Next_DD_Pointer
DMA_buffer_start_addr
0x80000000
0x60000000
Isochronous_endpoint
NULL
1
1
1
1
Packet_Valid
NA
1
15
Packet_Length
Chapter 11: LPC17xx USB device controller
10
15
20
8
0
Next_DD_Valid
DD_Status
0x0
0
DD_Retired
DMA_mode
0
0
data memory
EMPTY
FULL
UM10360
© NXP B.V. 2010. All rights reserved.
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