LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 784

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
34.4.4.2.1 Calculating the RELOAD value
34.4.4.2 SysTick Reload Value Register
34.4.4.3 SysTick Current Value Register
34.4.4.4 SysTick Calibration Value Register
The LOAD register specifies the start value to load into the VAL register. See the register
summary in
Table 676. LOAD register bit assignments
The RELOAD value can be any value in the range 0x00000001-0x00FFFFFF. A start value of
0 is possible, but has no effect because the SysTick exception request and COUNTFLAG
are activated when counting from 1 to 0.
The RELOAD value is calculated according to its use:
The VAL register contains the current value of the SysTick counter. See the register
summary in
Table 677. VAL register bit assignments
The CALIB register indicates the SysTick calibration properties. See the register summary
in
Table 678. CALIB register bit assignments
Bits
[31:24]
[23:0]
Bits
[31:24]
[23:0]
Bits
[31]
[30]
[29:24]
[23:0]
•
•
Table 674
To generate a multi-shot timer with a period of N processor clock cycles, use a
RELOAD value of N-1. For example, if the SysTick interrupt is required every 100
clock pulses, set RELOAD to 99.
To deliver a single SysTick interrupt after a delay of N processor clock cycles, use a
RELOAD of value N. For example, if a SysTick interrupt is required after 400 clock
pulses, set RELOAD to 400.
Name
NOREF
SKEW
-
TENMS
Name
-
CURRENT
Table 674
Table 674
for its attributes. The bit assignments are shown in
All information provided in this document is subject to legal disclaimers.
Name
-
RELOAD
Function
Indicates whether a separate reference clock is available. This value is
factory preset as described in
Indicates whether the value of TENMS is precise. This can affect the
suitability of SysTick as a software real time clock. This value is factory
preset as described in
Reserved.
This value is factory preset as described in
Rev. 2 — 19 August 2010
for its attributes. The bit assignments are shown in
for its attributes. The bit assignments are shown in
Function
Reserved.
Reads return the current value of the SysTick counter.
A write of any value clears the field to 0, and also clears the
SysTick CTRL.COUNTFLAG bit to 0.
Function
Reserved.
Value to load into the VAL register when the counter is
enabled and when it reaches 0, see
Chapter 34: Appendix: Cortex-M3 user guide
Section
Section
23.1.
23.1.
Section
Table
23.1.
Section
UM10360
678.
© NXP B.V. 2010. All rights reserved.
Table
Table
34.4.4.2.1.
676.
677.
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