LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 822

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
11.9.1
11.9.2
11.9.3
11.9.4
11.10
11.10.1
11.10.1.1 USB Clock Control register (USBClkCtrl -
11.10.1.2 USB Clock Status register (USBClkSt - 0x5000
11.10.2
11.10.2.1 USB Interrupt Status register (USBIntSt -
11.10.2.2 USB Device Interrupt Status register
11.10.2.3 USB Device Interrupt Enable register
11.10.2.4 USB Device Interrupt Clear register
11.10.2.5 USB Device Interrupt Set register (USBDevIntSet
11.10.2.6 USB Device Interrupt Priority register
11.10.3
11.10.3.1 USB Endpoint Interrupt Status register
11.10.3.2 USB Endpoint Interrupt Enable register
11.10.3.3 USB Endpoint Interrupt Clear register
11.10.3.4 USB Endpoint Interrupt Set register (USBEpIntSet
11.10.3.5 USB Endpoint Interrupt Priority register
11.10.4
11.10.4.1 EP RAM requirements . . . . . . . . . . . . . . . . . 230
11.10.4.2 USB Realize Endpoint register (USBReEp -
11.10.4.3 USB Endpoint Index register (USBEpIn - 0x5000
11.10.4.4 USB MaxPacketSize register (USBMaxPSize -
11.10.5
11.10.5.1 USB Receive Data register (USBRxData - 0x5000
11.10.5.2 USB Receive Packet Length register
11.10.5.3 USB Transmit Data register (USBTxData - 0x5000
UM10360
User manual
Register description . . . . . . . . . . . . . . . . . . . 220
Power requirements . . . . . . . . . . . . . . . . . . . 218
Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Power management support . . . . . . . . . . . . 219
Remote wake-up . . . . . . . . . . . . . . . . . . . . . 220
Clock control registers . . . . . . . . . . . . . . . . . 221
0x5000 CFF4). . . . . . . . . . . . . . . . . . . . . . . . 221
CFF8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Device interrupt registers . . . . . . . . . . . . . . . 222
0x5000 C1C0) . . . . . . . . . . . . . . . . . . . . . . . 222
(USBDevIntSt - 0x5000 C200). . . . . . . . . . . 223
(USBDevIntEn - 0x5000 C204) . . . . . . . . . . 224
(USBDevIntClr - 0x5000 C208) . . . . . . . . . . 224
- 0x5000 C20C) . . . . . . . . . . . . . . . . . . . . . . 225
(USBDevIntPri - 0x5000 C22C) . . . . . . . . . . 225
Endpoint interrupt registers. . . . . . . . . . . . . . 226
(USBEpIntSt - 0x5000 C230). . . . . . . . . . . . 226
(USBEpIntEn - 0x5000 C234) . . . . . . . . . . . 227
(USBEpIntClr - 0x5000 C238) . . . . . . . . . . . 228
- 0x5000 C23C) . . . . . . . . . . . . . . . . . . . . . . 229
(USBEpIntPri - 0x5000 C240) . . . . . . . . . . . 229
Endpoint realization registers . . . . . . . . . . . . 230
0x5000 C244) . . . . . . . . . . . . . . . . . . . . . . . 230
0x5000 C24C) . . . . . . . . . . . . . . . . . . . . . . . 232
USB transfer registers . . . . . . . . . . . . . . . . . 232
(USBRxPLen - 0x5000 C220) . . . . . . . . . . . 233
C248). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
C218). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
C21C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
11.10.5.4 USB Transmit Packet Length register
11.10.5.5 USB Control register (USBCtrl - 0x5000
11.10.6
11.10.6.1 USB Command Code register (USBCmdCode -
11.10.6.2 USB Command Data register (USBCmdData -
11.10.7
11.10.7.1 USB DMA Request Status register (USBDMARSt
11.10.7.2 USB DMA Request Clear register (USBDMARClr
11.10.7.3 USB DMA Request Set register (USBDMARSet -
11.10.7.4 USB UDCA Head register (USBUDCAH - 0x5000
11.10.7.5 USB EP DMA Status register (USBEpDMASt -
11.10.7.6 USB EP DMA Enable register (USBEpDMAEn -
11.10.7.7 USB EP DMA Disable register (USBEpDMADis -
11.10.7.8 USB DMA Interrupt Status register (USBDMAIntSt
11.10.7.9 USB DMA Interrupt Enable register
11.10.7.10 USB End of Transfer Interrupt Status register
11.10.7.11 USB End of Transfer Interrupt Clear register
11.10.7.12 USB End of Transfer Interrupt Set register
11.10.7.13 USB New DD Request Interrupt Status register
11.10.7.14 USB New DD Request Interrupt Clear register
11.10.7.15 USB New DD Request Interrupt Set register
11.10.7.16 USB System Error Interrupt Status register
11.10.7.17 USB System Error Interrupt Clear register
11.10.7.18 USB System Error Interrupt Set register
11.11
Interrupt handling . . . . . . . . . . . . . . . . . . . . 241
(USBTxPLen - 0x5000 C224) . . . . . . . . . . . 234
C228) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
SIE command code registers. . . . . . . . . . . . 234
0x5000 C210) . . . . . . . . . . . . . . . . . . . . . . . 235
0x5000 C214) . . . . . . . . . . . . . . . . . . . . . . . 235
DMA registers . . . . . . . . . . . . . . . . . . . . . . . 235
- 0x5000 C250) . . . . . . . . . . . . . . . . . . . . . . 235
- 0x5000 C254) . . . . . . . . . . . . . . . . . . . . . . 236
0x5000 C258) . . . . . . . . . . . . . . . . . . . . . . . 236
0x5000 C284) . . . . . . . . . . . . . . . . . . . . . . . 237
0x5000 C288) . . . . . . . . . . . . . . . . . . . . . . . 238
0x5000 C28C). . . . . . . . . . . . . . . . . . . . . . . 238
- 0x5000 C290) . . . . . . . . . . . . . . . . . . . . . . 238
(USBDMAIntEn - 0x5000 C294) . . . . . . . . . 239
(USBEoTIntSt - 0x5000 C2A0) . . . . . . . . . . 239
(USBEoTIntClr - 0x5000 C2A4) . . . . . . . . . 239
(USBEoTIntSet - 0x5000 C2A8) . . . . . . . . . 240
(USBNDDRIntSt - 0x5000 C2AC) . . . . . . . . 240
(USBNDDRIntClr - 0x5000 C2B0) . . . . . . . 240
(USBNDDRIntSet - 0x5000 C2B4) . . . . . . . 240
(USBSysErrIntSt - 0x5000 C2B8) . . . . . . . . 241
(USBSysErrIntClr - 0x5000 C2BC) . . . . . . . 241
(USBSysErrIntSet - 0x5000 C2C0). . . . . . . 241
Slave mode . . . . . . . . . . . . . . . . . . . . . . . . . . 242
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
C280) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
Chapter 35: Supplementary information
UM10360
© NXP B.V. 2010. All rights reserved.
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