LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 93

IC ARM CORTEX MCU 512K 80-LQFP

LPC1759FBD80,551

Manufacturer Part Number
LPC1759FBD80,551
Description
IC ARM CORTEX MCU 512K 80-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1759FBD80,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
80-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
52
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
On-chip Dac
10 bit
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC17xx
Maximum Speed
120 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4968
935290523551

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NXP Semiconductors
Table 72.
UM10360
User manual
Pin Symbol
5
9
Row F
1
5
9
Row G
1
5
9
Row H
1
5
9
P0[23]/AD0[0]/
I2SRX_CLK/CAP3[0]
P2[7]/RD2/RTS1
VREFN
P1[21]/MCABORT/
PWM1[3]/SSEL0
P0[17]/CTS1/
MISO0/MISO
RTCX2
P1[25]/MCOA1/
MAT1[1]
P0[20]/DTR1/SCL1
P1[30]/V
AD0[4]
P1[24]/MCI2/
PWM1[5]/MOSI0
V
DD(3V3)
Pin allocation table TFBGA100 package
BUS
/
Pin Symbol
6
10
2
6
10
2
6
10
2
6
10
P4[29]/TX_MCLK/
MAT2[1]/RXD3
P2[8]/TD2/TXD2
RTCX1
P0[18]/DCD1/
MOSI0/MOSI
P0[15]/TXD1/
SCK0/SCK
VBAT
P1[29]/MCOB2/
PCAP1[1]/MAT0[1]
P0[19]/DSR1/SDA1
XTAL1
V
P0[22]/RTS1/TD1
DD(REG)(3V3)
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
…continued
Pin Symbol
7
11
3
7
11
3
7
11
3
7
11
P2[3]/PWM1[4]/
DCD1/TRACEDATA[2]
-
RESET
P2[9]/USB_CONNECT/
RXD2
-
XTAL2
V
-
P3[25]/MAT0[0]/
PWM1[2]
P0[10]/TXD2/
SDA2/MAT3[0]
-
SS
Chapter 7: LPC17xx Pin configuration
Pin Symbol
8
12
4
8
12
4
8
12
4
8
12
P2[6]/PCAP1[0]/
RI1/TRACECLK
-
P1[31]/SCK1/
AD0[5]
P0[16]/RXD1/
SSEL0/SSEL
-
P0[30]/USB_D −
P0[21]/RI1/RD1
-
P1[18]/USB_UP_LED/
PWM1[1]/CAP1[0]
P2[11]/EINT1/
I2STX_CLK
-
UM10360
© NXP B.V. 2010. All rights reserved.
93 of 840

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