LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 748

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
34.3.3.4 Vector table
34.3.3.5 Exception priorities
The vector table contains the reset value of the stack pointer, and the start addresses,
also called exception vectors, for all exception handlers.
the exception vectors in the vector table. The least-significant bit of each vector must be 1,
indicating that the exception handler is Thumb code. Note that the upper limit of the IRQ
number is device dependent.
On system reset, the vector table is fixed at address 0x00000000. Privileged software can
write to the VTOR to relocate the vector table start address to a different memory location,
in the range 0x00000080 to 0x3FFFFF80, see
As
If software does not configure any priorities, then all exceptions with a configurable priority
have a priority of 0. For information about configuring exception priorities see
Fig 147. Vector table
•
•
Table 639
a lower priority value indicating a higher priority
configurable priorities for all exceptions except Reset, Hard fault, and NMI.
shows, all exceptions have an associated priority, with:
All information provided in this document is subject to legal disclaimers.
Exception
number
127
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
.
.
.
Rev. 2 — 19 August 2010
number
IRQ
111
-10
-11
-12
-13
-14
-1
-2
-5
2
1
0
0x004C
0x003C
0x002C
0x000C
0x0048
0x0044
0x0040
0x0038
0x0018
0x0014
0x0010
0x0008
0x0004
0x0000
0x1FC
Offset
Chapter 34: Appendix: Cortex-M3 user guide
.
.
.
Section 34.4.3.5 “Vector Table Offset
Memory management fault
Reserved for debug
Initial SP value.
Usage fault
Reserved
Reserved
Hard fault
Bus fault
PendSV
IRQ111
Systick
SVCall
Vector
Reset
IRQ2
IRQ1
IRQ0
NMI
Figure 147
.
.
.
shows the order of
UM10360
© NXP B.V. 2010. All rights reserved.
Register”.
748 of 840