Z8F042AHH020EG Zilog, Z8F042AHH020EG Datasheet - Page 189

• Manufacturer Part Number: Z8F042AHH020EG
• Description: IC ENCORE XP MCU FLASH 4K 20SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F042AHH020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4156; Z8F042AHH020EG

On-Chip Debugger Commands
PS022517-0508
OCDCNTR Register
Caution:
The OCD contains a multipurpose 16-bit Counter Register. It can be used for the
following:
•
•
•
When configured as a counter, the OCDCNTR register starts counting when the OCD
leaves DEBUG mode and stops counting when it enters DEBUG mode again or when it
reaches the maximum count of
to
between breakpoints.
Since this register is overwritten by various OCD commands, it should only be used to
generate temporary breakpoints, such as stepping over CALL instructions or running to a
specific instruction and stopping.
The host communicates to the OCD by sending OCD commands using the DBG interface.
During normal operation, only a subset of the OCD commands are available. In DEBUG
mode, all OCD commands become available unless the user code and control registers are
protected by programming the Read Protect Option Bit (RP). The Read Protect Option Bit
prevents the code in memory from being read out of the Z8 Encore! XP F0822 Series
products. When this option is enabled, several of the OCD commands are disabled.
Table 93
described further in the bulleted list. It also lists the commands that operate when the
device is not in DEBUG mode (normal operation) and those commands that are disabled
by programming the Read Protect Option Bit.
0000H
Count system clock cycles between Breakpoints.
Generate a BRK when it counts down to zero.
Generate a BRK when its value matches the Program Counter.
The OCDCNTR register is used by many of the OCD commands. It counts
the number of bytes for the register and memory read/write commands. It
holds the residual value when generating the CRC. Therefore, if the OCD-
CNTR is being used to generate a BRK, its value should be written as a last
step before leaving DEBUG mode.
on page 177 contains a summary of the OCD commands. Each OCD command is
when the OCD exits DEBUG mode if it is configured to count clock cycles
FFFFH
. The OCDCNTR register automatically resets itself
Z8 Encore! XP
Product Specification
®
On-Chip Debugger
F0822 Series
176