C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet - Page 117

• Manufacturer Part Number: C8051F120-GQR
• Description: IC 8051 MCU FLASH 128K 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F12xr

Specifications of C8051F120-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.3.
On the C8051F130/1/2/3 devices, the VREF0 pin provides a voltage reference input for ADC0, which can
be connected to an external precision reference or the internal voltage reference, as shown in Figure 9.3.
The REF0CN register for the C8051F130/1/2/3 is described in SFR Definition 9.3.
Bits7–5: UNUSED. Read = 000b; Write = don’t care.
Bits4–3: Reserved: Must be written to 0.
Bit2:
Bit1:
Bit0:
SFR Page:
SFR Address:
Figure 9.3. Voltage Reference Functional Block Diagram (C8051F130/1/2/3)
R/W
Bit7
-
Reference Configuration on the C8051F130/1/2/3
SFR Definition 9.3. REF0CN: Reference Control (C8051F130/1/2/3)
TEMPE: Temperature Sensor Enable Bit.
0: Internal Temperature Sensor Off.
1: Internal Temperature Sensor On.
BIASE: ADC/DAC Bias Generator Enable Bit. (Must be ‘1’ if using ADC or VREF).
0: Internal Bias Generator Off.
1: Internal Bias Generator On.
REFBE: Internal Reference Buffer Enable Bit.
0: Internal Reference Buffer Off.
1: Internal Reference Buffer On. Internal voltage reference is driven on the VREF pin.
0
0xD1
R/W
Bit6
Reference
-
External
Voltage
Circuit
DGND
VDD
Recommended Bypass
4.7F
R/W
Bit5
R1
-
Capacitors
+
Reserved Reserved
0.1F
R/W
Bit4
VREF0
VREF
Rev. 1.4
R/W
Bit3
C8051F120/1/2/3/4/5/6/7
REF0CN
x2
Ref
ADC0
TEMPE
R/W
Bit2
Band-Gap
C8051F130/1/2/3
Bias to ADC
1.2V
EN
BIASE
R/W
Bit1
REFBE
R/W
Bit0
00000000
Reset Value
117