C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet - Page 209

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C8051F120-GQR

Manufacturer Part Number
C8051F120-GQR
Description
IC 8051 MCU FLASH 128K 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Datasheets

Specifications of C8051F120-GQR

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
Bits 7–3: UNUSED. Read = 00000b, Write = don't care.
Bit 2:
Bit 1:
Bit 0:
R/W
Bit7
-
SFLE: Scratchpad Flash Memory Access Enable
When this bit is set, Flash MOVC reads and writes from user software are directed to the
two 128-byte Scratchpad Flash sectors. When SFLE is set to logic 1, Flash accesses out of
the address range 0x00-0xFF should not be attempted (with the exception of address
0x400, which can be used to simultaneously erase both Scratchpad areas). Reads/Writes
out of this range will yield undefined results.
0: Flash access from user software directed to the Program/Data Flash sector.
1: Flash access from user software directed to the two 128 byte Scratchpad sectors.
PSEE: Program Store Erase Enable.
Setting this bit allows an entire page of the Flash program memory to be erased provided
the PSWE bit is also set. After setting this bit, a write to Flash memory using the MOVX
instruction will erase the entire page that contains the location addressed by the MOVX
instruction. The value of the data byte written does not matter. Note: The Flash page con-
taining the Read Lock Byte and Write/Erase Lock Byte cannot be erased by software.
0: Flash program memory erasure disabled.
1: Flash program memory erasure enabled.
PSWE: Program Store Write Enable.
Setting this bit allows writing a byte of data to the Flash program memory using the MOVX
write instruction. The location must be erased prior to writing data.
0: Write to Flash program memory disabled. MOVX write operations target External RAM.
1: Write to Flash program memory enabled. MOVX write operations target Flash memory.
SFR Definition 15.3. PSCTL: Program Store Read/Write Control
R/W
Bit6
-
R/W
Bit5
-
R/W
Bit4
-
Rev. 1.4
R/W
Bit3
-
C8051F120/1/2/3/4/5/6/7
SFLE
R/W
Bit2
C8051F130/1/2/3
PSEE
R/W
Bit1
SFR Address:
PSWE
SFR Page:
R/W
Bit0
0x8F
0
00000000
Reset Value
Address:
SFR
209

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