C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet - Page 323

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C8051F120-GQR

Manufacturer Part Number
C8051F120-GQR
Description
IC 8051 MCU FLASH 128K 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Datasheets

Specifications of C8051F120-GQR

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
Bits 7–0: RCAP2, 3, and 4L: Timer 2, 3, and 4 Capture Register Low Byte.
Bits 7–0: RCAP2, 3, and 4H: Timer 2, 3, and 4 Capture Register High Byte.
Bits 7–0: TL2, 3, and 4: Timer 2, 3, and 4 Low Byte.
SFR Address: RCAP2H: 0xCB; RCAP3H: 0xCB; RCAP4H: 0xCB
SFR Address: RCAP2L: 0xCA; RCAP3L: 0xCA; RCAP4L: 0xCA
SFR Address: TMR2L: 0xCC; TMR3L: 0xCC; TMR4L: 0xCC
SFR Definition 23.11. RCAPnH: Timer 2, 3, and 4 Capture Register High Byte
SFR Definition 23.10. RCAPnL: Timer 2, 3, and 4 Capture Register Low Byte
SFR Page: RCAP2H: page 0; RCAP3H: page 1; RCAP4H: page 2
SFR Page: RCAP2L: page 0; RCAP3L: page 1; RCAP4L: page 2
SFR Page: TMR2L: page 0; TMR3L: page 1; TMR4L: page 2
R/W
R/W
R/W
Bit7
Bit7
Bit7
The RCAP2, 3, and 4L register captures the low byte of Timer 2, 3, and 4 when Timer 2, 3,
and 4 is configured in capture mode. When Timer 2, 3, and 4 is configured in auto-reload
mode, it holds the low byte of the reload value.
The RCAP2, 3, and 4H register captures the high byte of Timer 2, 3, and 4 when Timer 2, 3,
and 4 is configured in capture mode. When Timer 2, 3, and 4 is configured in auto-reload
mode, it holds the high byte of the reload value.
The TL2, 3, and 4 register contains the low byte of the 16-bit Timer 2, 3, and 4
SFR Definition 23.12. TMRnL: Timer 2, 3, and 4 Low Byte
R/W
R/W
R/W
Bit6
Bit6
Bit6
R/W
R/W
R/W
Bit5
Bit5
Bit5
R/W
R/W
Bit4
R/W
Bit4
Bit4
Rev. 1.4
R/W
R/W
Bit3
R/W
Bit3
Bit3
C8051F120/1/2/3/4/5/6/7
R/W
R/W
Bit2
R/W
Bit2
Bit2
C8051F130/1/2/3
R/W
R/W
R/W
Bit1
Bit1
Bit1
R/W
R/W
R/W
Bit0
Bit0
Bit0
00000000
00000000
Reset Value
00000000
Reset Value
Reset Value
323

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