C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet - Page 119

• Manufacturer Part Number: C8051F120-GQR
• Description: IC 8051 MCU FLASH 128K 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F12xr

Specifications of C8051F120-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10. Comparators
Two on-chip programmable voltage comparators are included, as shown in Figure 10.1. The inputs of each
comparator are available at dedicated pins. The output of each comparator is optionally available at the
package pins via the I/O crossbar. When assigned to package pins, each comparator output can be pro-
grammed to operate in open drain or push-pull modes. See
Priority Crossbar Decoder” on page 238
CP0+
CP0-
CP1+
CP1-
Figure 10.1. Comparator Functional Block Diagram
CP0HYN1
CP0HYN0
CP1HYN1
CP1HYN0
CP0HYP1
CP0HYP0
CP1HYP1
CP1HYP0
CP0MD1
CP0MD0
CP0OUT
CP1MD1
CP1MD0
CP1OUT
CP0RIE
CP1RIE
CP0FIE
CP0RIF
CP0FIF
CP1FIE
CP1RIF
CP1FIF
CP0EN
CP1EN
for Crossbar and port initialization details.
CP0MD
CP1MD
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
+
-
+
-
AV+
AV+
Section “18.1. Ports 0 through 3 and the
AGND
AGND
C8051F130/1/2/3
Decision
(SYNCHRONIZER)
(SYNCHRONIZER)
Reset
D
D
Tree
CLR
CLR
SET
SET
Q
Q
Q
Q
D
D
SET
CLR
SET
CLR
Q
Q
Q
Q
Crossbar
Crossbar
Interrupt
Interrupt
Handler
Handler
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