C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet - Page 208

• Manufacturer Part Number: C8051F120-GQR
• Description: IC 8051 MCU FLASH 128K 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F12xr

Specifications of C8051F120-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
208
Bits 7–6: Unused.
Bits 5–4: FLRT: Flash Read Time.
Bits 3–1: RESERVED. Read = 000b. Must Write 000b.
Bit 0:
Important Note: When changing the FLRT bits to a lower setting (e.g. when changing from a
R/W
Bit7
-
These bits should be programmed to the smallest allowed value, according to the system
clock speed.
00: SYSCLK < 25 MHz.
01: SYSCLK < 50 MHz.
10: SYSCLK < 75 MHz.
11: SYSCLK < 100 MHz.
FLWE: Flash Write/Erase Enable.
This bit must be set to allow Flash writes/erasures from user software.
0: Flash writes/erases disabled.
1: Flash writes/erases enabled.
value of 11b to 00b), cache reads, cache writes, and the prefetch engine should be
disabled using the CCH0CN register (see SFR Definition 16.1).
R/W
Bit6
-
SFR Definition 15.2. FLSCL: Flash Memory Control
R/W
Bit5
FLRT
R/W
Bit4
Reserved Reserved Reserved
Rev. 1.4
R/W
Bit3
R/W
Bit2
R/W
Bit1
SFR Address:
SFR Page:
FLWE
R/W
Bit0
0xB7
0
SFR Address:
10000000
Reset Value