HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 221

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Bit 12: HIZCNT
0
1
Bit 11—Endian Flag (ENDIAN): Samples the value of the external pin designating endian upon a
power-on reset. Endian for all physical spaces is decided by this bit, which is read-only.
Bit 11: ENDIAN
0
1
Bits 10 and 9—Area 0 Burst ROM Control (A0BST1, A0BST0): These bits specify whether to
use burst ROM in physical space area 0. When burst ROM is used, they set the number of burst
transfers.
Bit 10: A0BST1
0
1
Bits 8 and 7—Area 5 Burst Enable (A5BST1, A5BST0): These bits specify whether to use burst
ROM and PCMCIA burst mode in physical space area 5. When burst ROM and PCMCIA burst
mode are used, they set the number of burst transfers.
Bit 8: A5BST1
0
1
Bit 9: A0BST0
0
1
0
1
Bit 7: A5BST0
0
1
0
1
Description
RAS and CAS signals become high-impedance (High-Z) in standby mode
and in bus-released state.
RAS and CAS signals drive in standby mode and in bus-released state.
Description
(On reset) Endian setting external pin (MD5) is low. Indicates the SH7708
Series is set as big-endian.
(On reset) Endian setting external pin (MD5) is high. Indicates the SH7708
Series is set as little-endian.
Description
Access area 0 as normal memory.
Access area 0 as burst ROM (4 consecutive accesses).
Can be used when bus width is 8, 16, or 32.
Access area 0 as burst ROM (8 consecutive accesses).
Can be used only when bus width is 8 or 16.
Access area 0 as burst ROM (16 consecutive
accesses). Can be used only when bus width is 8.
Description
Access area 5 as normal memory.
Burst access of area 5 (4 consecutive accesses). Can
be used when bus width is 8, 16, or 32.
Burst access of area 5 (8 consecutive accesses). Can
be used only when bus width is 8 or 16.
Burst access of area 5 (16 consecutive accesses). Can
be used only when bus width is 8.
(Initial value)
(Initial value)
(Initial value)
201