HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 423

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

14.2.2
In the smart card interface mode, the function of SCSSR bit 4 is changed. The setting conditions
for bit 2, the TEND bit, are also changed.
Note: Only 0 can be written, to clear the flag.
Bits 7 to 5: These bits have the same function as in the ordinary SCI. See section 13, Serial
Communication Interface, for more information.
Bit 4—Error Signal Status (ERS): In the smart card interface mode, bit 4 indicates the status of the
error signal returned from the receiving side during transmission. The smart card interface cannot
detect framing errors.
Bit 4: ERS
0
1
Note: The ERS flag maintains its status even when the TE bit in SCSCR is cleared to 0.
Initial value:
Bit name:
Serial Status Register (SCSSR)
R/W:
Bit:
Description
Receiving ended normally with no error signal.
ERS is cleared to 0 when the chip is reset or enters standby mode, or when
software reads ERS after it has been set to 1, then writes 0 in ERS.
An error signal indicating a parity error was transmitted from the receiving side.
ERS is set to 1 if the error signal sampled is low.
R/(W)*
TDRE
7
1
R/(W)*
RDRF
6
0
R/(W)*
ORER FER/ERS
5
0
R/(W)*
4
0
R/(W)*
PER
3
0
TEND
2
1
R
MPB
1
0
R
(Initial value)
MPBT
R/W
0
0
403