ST92F150JDV1QC STMicroelectronics, ST92F150JDV1QC Datasheet - Page 140

IC MCU 128K FLASH 100-PQFP

ST92F150JDV1QC

Manufacturer Part Number
ST92F150JDV1QC
Description
IC MCU 128K FLASH 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet

Specifications of ST92F150JDV1QC

Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-QFP
Processor Series
ST92F15x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
5 x 16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Case
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2137

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0
ST92F124/F150/F250 - RESET AND CLOCK CONTROL UNIT (RCCU)
7.6 RESET/STOP MANAGER
The Reset/Stop Manager resets the MCU when
one of the three following events occurs:
– A Hardware reset, initiated by a low level on the
– A Software reset, initiated by a HALT instruction
– A Watchdog end of count condition.
The event which caused the last Reset is flagged
in the CLK_FLAG register, by setting either the
Figure 70. Oscillator Start-up Sequence and Reset Timing
140/429
9
Reset pin.
(when enabled with the SRESEN bit of the
CLKCTL register).
V
OSCIN
OSCOUT
INTCLK
RESET
PIN
V
DD
DD
MAX
MIN
T
STUP
SOFTRES or the WDGRES bit or both; a hard-
ware initiated reset will leave both these bits reset.
The hardware reset overrides all other conditions
and forces the ST9 to the reset state. During Re-
set, the internal registers are set to their reset val-
ues (when these reset values are defined, other-
wise the register content will remain unchanged),
and the I/O pins are set to Bidirectional Weak-Pull-
Up or High impedance input. See
Reset is asynchronous: as soon as the reset pin is
driven low, a Reset cycle is initiated.
Section
VR02085A
7.3.

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