ST92F150JDV1QC STMicroelectronics, ST92F150JDV1QC Datasheet - Page 213

• Manufacturer Part Number: ST92F150JDV1QC
• Description: IC MCU 128K FLASH 100-PQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F150JDV1QC

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-QFP
• Processor Series: ST92F15x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Case: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2137

MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
10.5.3 Functional Description
The SCI-M has four operating modes:
– Asynchronous mode
– Asynchronous mode with synchronous clock
– Serial expansion mode
– Synchronous mode
Figure 107. SCI -M Functional Schematic
Note: Some pins may not be available on some devices. Refer to the device Pinout Description.
RXclk
AEN (*)
OCKSB (*)
INPEN (*)
OCKPL (*)
The control signals marked with (*) are active only in synchronous mode (SMEN=1)
TXclk / CLKout
LBEN (*)
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
XTCLK
OCLK
Baud rate
generator
OCLK
XRX
INTCLK
XBRG
Divider by 16
Divider by 16
DCDEN (*)
Polarity
DCD
Asynchronous mode, Asynchronous mode with
synchronous clock and Serial expansion mode
output data with the same serial frame format. The
differences lie in the data sampling clock rates
(1X, 16X) and in the protocol used.
Polarity
RTS
CD
1
0
1
0
CD
AEN (*)
RTSEN (*)
RX buffer
RX shift
register
register
Enveloper
TX buffer
TX shift
register
register
LBEN
INPL (*)
OUTPL (*)
OUTSB (*)
VR02054
AEN
213/429
Sout
Sin
9