MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 107

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.4.3 Keyboard Initialization
When a keyboard interrupt pin is enabled, it takes time for the internal pullup to pull the pin to a high level.
Therefore a false interrupt can occur as soon as the pin is enabled.
To prevent a false interrupt on keyboard initialization:
An interrupt signal on an edge sensitive pin can be acknowledged immediately after enabling the pin. An
interrupt signal on an edge and level sensitive pin must be acknowledged after a delay that depends on
the external load.
10.5 Interrupts
The following KBI source can generate interrupt requests:
10.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
10.6.1 Wait Mode
The KBI module remains active in wait mode. Clearing IMASKK in INTKBSCR enables keyboard interrupt
requests to bring the MCU out of wait mode.
10.6.2 Stop Mode
The KBI module remains active in stop mode. Clearing IMASKK in INTKBSCR enables keyboard interrupt
requests to bring the MCU out of stop mode.
10.7 KBI During Break Interrupts
The system integration module (SIM) controls whether status bits in other modules can be cleared during
the break state. BCFE in the break flag control register (BFCR) enables software to clear status bits
during the break state. See BFCR in the SIM section of this data
To allow software to clear status bits during a break interrupt, write a 1 to BCFE. If a status bit is cleared
during the break state, it remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a 0 to BCFE. With BCFE cleared (its default state),
software can read and write registers during the break state without affecting status bits. Some status bits
have a two-step read/write clearing procedure. If software does the first step on such a bit before the
break, the bit cannot change during the break state as long as BCFE is cleared. After the break, doing
the second step clears the status bit.
Freescale Semiconductor
1. Mask keyboard interrupts by setting IMASKK in INTKBSCR.
2. Enable the KBI pins by setting the appropriate KBIEx bits in INTKBIER.
3. Write to ACKK in INTKBSCR to clear any false interrupts.
4. Clear IMASKK.
•
Keyboard flag (KEYF) — KEYF is set when any enabled KBI pin is asserted based on the KBI
mode. The keyboard interrupt mask bit, IMASKK, is used to enable or disable KBI interrupt
requests.
MC68HC908GP32 Data Sheet, Rev. 10
sheet.
Interrupts
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