MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 40

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MC68HC908GP32CB

Manufacturer Part Number
MC68HC908GP32CB
Description
IC MCU 32K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Memory
In applications that need more than 1000 program/erase cycles, use the 4-ms page erase specification
to get improved long-term reliability. Any application can use this 4-ms page erase specification.
However, in applications where a FLASH location will be erased and reprogrammed less than 1000 times,
and speed is important, use the 1-ms page erase specification to get a shorter cycle time.
2.6.4 FLASH Mass Erase Operation
Use this step-by-step procedure to erase entire FLASH memory.
2.6.5 FLASH Program Operation
Programming of the FLASH memory is done on a row basis. A row consists of 64 consecutive bytes
starting from addresses $XX00, $XX40, $0080 and $XXC0.
1. When in Monitor mode, with security sequence failed
40
10. After a time, t
10. After a time, t
of any FLASH address.
6. Wait for a time, t
7. Clear the ERASE bit.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set both the ERASE bit, and the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
Programming and erasing of FLASH locations cannot be performed by
code being executed from FLASH memory. While these operations must
be performed in the order shown, other unrelated operations may occur
between the steps.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps.
rcv
rcv
Erase
nvh
nvs
MErase
nvhl
(typ. 1 µs), the memory can be accessed again in read mode.
(min. 1 µs), the memory can be accessed again in read mode.
(min. 5 µs)
(min. 10 µs)
(min. 100 µs)
(min. 1 ms or 4 ms)
(min. 4 ms)
MC68HC908GP32 Data Sheet, Rev. 10
(1)
(see 18.3.2
within the FLASH memory address range.
NOTE
NOTE
NOTE
Security), write to the FLASH block protect register instead
Freescale Semiconductor

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