MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 70

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MC68HC908GP32CB

Manufacturer Part Number
MC68HC908GP32CB
Description
IC MCU 32K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Clock Generator Module (CGM)
5.4.4 PLL Analog Power Pin (V
V
potential as the V
5.4.5 PLL Analog Ground Pin (V
V
potential as the V
5.4.6 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal comes from the system integration module (SIM) and enables the oscillator and
PLL.
5.4.7 Oscillator Stop Mode Enable Bit (OSCSTOPENB)
OSCSTOPENB is a bit in the CONFIG register that enables the oscillator to continue operating during
stop mode. If this bit is set, the Oscillator continues running during stop mode. If this bit is not set (default),
the oscillator is controlled by the SIMOSCEN signal which will disable the oscillator during stop mode.
5.4.8 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the crystal (f
directly from the crystal oscillator circuit.
and OSC2 and may not represent the actual circuitry. The duty cycle of CGMXCLK is unknown and may
depend on the crystal and other external factors. Also, the frequency and amplitude of CGMXCLK can be
unstable at startup.
5.4.9 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal goes to the SIM, which generates the MCU clocks.
CGMOUT is a 50 percent duty cycle clock running at twice the bus frequency. CGMOUT is software
programmable to be either the oscillator output, CGMXCLK, divided by two or the VCO clock, CGMVCLK,
divided by two.
5.4.10 CGM CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.
70
DDA
SSA
is a ground pin used by the analog portions of the PLL. Connect the V
is a power pin used by the analog portions of the PLL. Connect the V
Route V
capacitors as close as possible to the package.
Route V
capacitors as close as possible to the package.
DD
SS
pin.
pin.
DDA
SSA
carefully for maximum noise immunity and place bypass
carefully for maximum noise immunity and place bypass
MC68HC908GP32 Data Sheet, Rev. 10
DDA
SSA
Figure 5-2
)
)
NOTE
NOTE
shows only the logical relation of CGMXCLK to OSC1
DDA
SSA
pin to the same voltage
pin to the same voltage
Freescale Semiconductor
XCLK
) and comes

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