MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 52

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MC68HC908GP32CB

Manufacturer Part Number
MC68HC908GP32CB
Description
IC MCU 32K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Low-Power Modes
3.15 Exiting Stop Mode
These events restart the system clocks and load the program counter with the reset vector or with an
interrupt vector:
Upon exit from stop mode, the system clocks begin running after an oscillator stabilization delay. A 12-bit
stop recovery counter inhibits the system clocks for 4096 CGMXCLK cycles after the reset or external
interrupt.
The short stop recovery bit, SSREC, in the configuration register controls the oscillator stabilization delay
during stop recovery. Setting SSREC reduces stop recovery time from 4096 CGMXCLK cycles to 32
CGMXCLK cycles.
52
Serial peripheral interface module (SPI) interrupt — A CPU interrupt request from the SPI loads
the program counter with the contents of:
Serial communications interface module (SCI) interrupt — A CPU interrupt request from the SCI
loads the program counter with the contents of:
Analog-to-digital converter module (ADC) interrupt — A CPU interrupt request from the ADC loads
the program counter with the contents of: $FFDE and $FFDF; ADC conversion complete.
Timebase module (TBM) interrupt — A CPU interrupt request from the TBM loads the program
counter with the contents of: $FFDC and $FFDD; TBM interrupt.
External reset — A logic 0 on the RST pin resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
External interrupt — A high-to-low transition on an external interrupt pin loads the program counter
with the contents of locations:
Low-voltage inhibit (LVI) reset — A power supply voltage below the LVI
and loads the program counter with the contents of locations $FFFE and $FFFF.
Break interrupt — A break interrupt loads the program counter with the contents of locations
$FFFC and $FFFD.
Timebase module (TBM) interrupt — A TBM interrupt loads the program counter with the contents
of locations $FFDC and $FFDD when the timebase counter has rolled over. This allows the TBM
to generate a periodic wakeup from stop mode.
$FFE8 and $FFE9; SPI transmitter
$FFEA and $FFEB; SPI receiver
$FFE2 and $FFE3; SCI transmitter
$FFE4 and $FFE5; SCI receiver
$FFE6 and $FFE7; SCI receiver error
$FFFA and $FFFB; IRQ pin
$FFE0 and $FFE1; keyboard interrupt pins
Use the full stop recovery time (SSREC = 0) in applications that use an
external crystal.
MC68HC908GP32 Data Sheet, Rev. 10
NOTE
tripf
voltage resets the MCU
Freescale Semiconductor

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