MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 111

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 11
Low-Voltage Inhibit (LVI)
11.1 Introduction
This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the V
and can force a reset when the V
11.2 Features
Features of the LVI module include:
11.3 Functional Description
Figure 11-1
contains a bandgap reference circuit and comparator. Clearing the LVI power disable bit, LVIPWRD,
enables the LVI to monitor V
module to generate a reset when V
bit, LVISTOP, enables the LVI to operate in stop mode. Setting the LVI 5-V or 3-V trip point bit, LVI5OR3,
enables the trip point voltage, V
enables the trip point voltage, V
in
Freescale Semiconductor
Chapter 19 Electrical
•
•
•
Programmable LVI reset
Selectable LVI trip voltage
Programmable stop mode operation
shows the structure of the LVI module. The LVI is enabled out of reset. The LVI module
After a power-on reset (POR) the LVI’s default mode of operation is 3 V. If
a 5-V system is used, the user must set the LVI5OR3 bit to raise the trip
point to 5-V operation. Note that this must be done after every power-on
reset since the default will revert back to 3-V mode after each power-on
reset. If the V
3-V mode trip voltage when POR is released, the part will operate because
V
taken to ensure that V
released.
If the user requires 5-V mode and sets the LVI5OR3 bit after a power-on
reset while the V
will immediately go into reset. The LVI in this case will hold the part in reset
until either V
release reset or V
the power-on reset and reset the trip point to 3-V operation.
TRIPF
defaults to 3-V mode after a POR. So, in a 5-V system care must be
Specifications.
DD
DD
DD
goes above the rising 5-V trip point, V
TRIPF
DD
supply is below the 5-V mode trip voltage but above the
voltage. Clearing the LVI reset disable bit, LVIRSTD, enables the LVI
TRIPF
DD
DD
supply is not above the V
DD
MC68HC908GP32 Data Sheet, Rev. 10
decreases to approximately 0 V which will re-trigger
, to be configured for 3-V operation. The actual trip points are shown
voltage falls below the LVI trip falling voltage, V
, to be configured for 5-V operation. Clearing the LVI5OR3 bit
DD
falls below a voltage, V
is above the 5-V mode trip voltage after POR is
NOTE
NOTE
TRIPR
TRIPF
for 5-V mode, the MCU
. Setting the LVI enable in stop mode
TRIPR
, which will
TRIPF
.
DD
pin
111