MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 41

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will
fail. Use this step-by-step procedure to program a row of FLASH memory
representation).
This program sequence is repeated throughout the memory until all data is programmed.
Freescale Semiconductor
10. Clear the PGM bit. (See note.)
11. Wait for a time, t
12. Clear the HVEN bit.
13. After time, t
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address to be programmed. (See note.)
8. Wait for a time, t
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
address and data for programming.
Programming and erasing of FLASH locations can not be performed by
code being executed from the same FLASH array.
While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
within the FLASH array memory space such as the COP control register
(COPCTL) at $FFFF.
It is highly recommended that interrupts be disabled during program/ erase
operations.
Do not exceed t
cumulative high voltage programming time to the same row before next
erase. t
Refer to
The time between programming the FLASH address change (step 7 to
step 7), or the time between the last FLASH programmed to clearing the
RCV
HV
(typical 1 µs), the memory can be accessed in read mode again.
nvs
pgs
PROG
nvh
Only bytes which are currently $FF may be programmed.
19.17 Memory
must satisfy this condition:
(min. 10 µs).
(min. 5 µs).
(min. 5 µs).
t
NVS
(min. 30 µs).
PROG
+ t
NVH
MC68HC908GP32 Data Sheet, Rev. 10
maximum or t
Characteristics.
+ t
PGS
+ (t
NOTE
NOTE
NOTE
NOTE
NOTE
NOTE
PROG
HV
maximum. t
x 64) ≤ t
HV
HV
maximum
is defined as the
(Figure 2-4
is a flowchart
FLASH Memory
41