LFXP2-30E-5FN484C LATTICE SEMICONDUCTOR, LFXP2-30E-5FN484C Datasheet - Page 32

• Manufacturer Part Number: LFXP2-30E-5FN484C
• Description: IC, LATTICEXP2 FPGA, 435MHZ, FPBGA-484
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeXP2r

Specifications of LFXP2-30E-5FN484C

• No. Of Logic Blocks: 29000
• No. Of Macrocells: 14500
• Family Type: LatticeXP2
• No. Of Speed Grades: 5
• No. Of I/o's: 363
• Clock Management: PLL
• Total Ram Bits: 387Kbit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
shows the diagram using this gearbox function. For more information on this topic, see TN1138, LatticeXP2 High
Speed I/O Interface.
Figure 2-27. Output and Tristate Block
DQSXFER
DQSXFER
ONEG1
OPOS1
ONEG0
OPOS0
ONEG1
OPOS1
ONEG0
OPOS0
(CLKA)
(CLKB)
ECLK1
ECLK2
ECLK1
ECLK2
CLKA
CLKB
CLK1
CLK1
TD
TD
* Shared with input register
Clock Transfer
Clock Transfer
Registers
Registers
D
D
D-Type*
D-Type*
D-Type
D-Type
D
D
Tristate Logic
Tristate Logic
Q
Q
Q
Q
*
*
D
D
Latch
Latch
Q
Q
0
1
0
1
0
1
0
1
2-29
Note: Simplified version does not show CE and SET/RESET details
0
1
0
1
0
1
0
1
D
D
D
D
D
D
D
D
/LATCH
/LATCH
/LATCH
/LATCH
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
Q
Q
Q
Q
Q
Q
Q
Q
Comp PIO (B) in LVDS I/O Pair
LatticeXP2 Family Data Sheet
True PIO (A) in LVDS I/O Pair
D
D
D
D
DDR Output
DDR Output
Latch
Latch
Latch
Latch
Registers
Registers
Q
Q
Q
Q
Output Logic
Output Logic
0
1
0
1
0
1
0
1
0
1
0
1
Programmable
Programmable
Control
Control
0
1
0
1
0
1
0
1
Architecture
DO
DO
TO
TO