LFXP2-30E-5FN484C LATTICE SEMICONDUCTOR, LFXP2-30E-5FN484C Datasheet - Page 63

• Manufacturer Part Number: LFXP2-30E-5FN484C
• Description: IC, LATTICEXP2 FPGA, 435MHZ, FPBGA-484
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeXP2r

Specifications of LFXP2-30E-5FN484C

• No. Of Logic Blocks: 29000
• No. Of Macrocells: 14500
• Family Type: LatticeXP2
• No. Of Speed Grades: 5
• No. Of I/o's: 363
• Clock Management: PLL
• Total Ram Bits: 387Kbit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LatticeXP2 Internal Switching Characteristics
PFU/PFF Logic Mode Timing
t
t
t
t
t
t
t
t
t
t
PFU Dual Port Memory Mode Timing
t
t
t
t
t
t
t
PIO Input/Output Buffer Timing
t
t
IOLOGIC Input/Output Timing
t
t
t
t
t
t
t
t
LUT4_PFU
LUT6_PFU
LSR_PFU
SUM_PFU
HM_PFU
SUD_PFU
HD_PFU
CK2Q_PFU
RSTREC_PFU
RST_PFU
CORAM_PFU
SUDATA_PFU
HDATA_PFU
SUADDR_PFU
HADDR_PFU
SUWREN_PFU
HWREN_PFU
IN_PIO
OUT_PIO
SUI_PIO
HI_PIO
COO_PIO
SUCE_PIO
HCE_PIO
SULSR_PIO
HLSR_PIO
RSTREC_PIO
Parameter
LUT4 delay (A to D inputs to F
output)
LUT6 delay (A to D inputs to OFX
output)
Set/Reset to output of PFU (Asyn-
chronous)
Clock to Mux (M0,M1) Input
Setup Time
Clock to Mux (M0,M1) Input Hold
Time
Clock to D input setup time
Clock to D input hold time
Clock to Q delay, (D-type Register
Configuration)
Asynchronous reset recovery
time for PFU Logic
Asynchronous reset time for PFU
Logic
Clock to Output (F Port)
Data Setup Time
Data Hold Time
Address Setup Time
Address Hold Time
Write/Read Enable Setup Time
Write/Read Enable Hold Time
Input Buffer Delay (LVCMOS25)
Output Buffer Delay (LVCMOS25)
Input Register Setup Time (Data
Before Clock)
Input Register Hold Time (Data
after Clock)
Output Register Clock to Output
Delay
Input Register Clock Enable
Setup Time
Input Register Clock Enable Hold
Time
Set/Reset Setup Time
Set/Reset Hold Time
Asynchronous reset recovery
time for IO Logic
Description
Over Recommended Operating Conditions
-0.061
-0.206
-0.294
-0.146
-0.022
-0.080
0.154
0.061
0.002
0.239
0.295
0.158
0.583
0.062
0.032
0.184
Min.
0.23
—
—
—
—
—
—
—
—
—
—
-7
3-19
0.216
0.304
0.720
0.342
0.520
0.720
1.082
0.858
1.561
0.608
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-0.057
-0.240
-0.333
-0.169
-0.025
-0.086
0.151
0.077
0.003
0.275
0.333
0.182
0.893
0.322
0.037
0.201
Min.
0.25
1
—
—
—
—
—
—
—
—
—
—
DC and Switching Characteristics
-6
LatticeXP2 Family Data Sheet
0.238
0.399
0.769
0.363
0.634
0.769
1.267
0.766
1.403
0.661
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-0.053
-0.274
-0.371
-0.193
-0.028
-0.093
0.148
0.093
0.003
0.312
0.371
0.207
1.201
0.482
0.041
0.217
Min.
0.27
—
—
—
—
—
—
—
—
—
—
-5
0.260
0.494
0.818
0.383
0.748
0.818
1.452
0.674
1.246
0.715
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns