MT46H64M16LFBF-6 IT:B Micron Technology Inc, MT46H64M16LFBF-6 IT:B Datasheet - Page 26

• Manufacturer Part Number: MT46H64M16LFBF-6 IT:B
• Description: 64MX16 MOBILE DDR SDRAM PLASTIC IND TEMP GREEN VFBGA 1.8V
• Manufacturer: Micron Technology Inc

Specifications of MT46H64M16LFBF-6 IT:B

• Lead Free Status / RoHS Status: Compliant

Table 9: I
Notes 1–5 apply to all the parameters/conditions in this table; V
PDF: 09005aef83d9bee4
1gb_ddr_mobile_sdram_t68m.pdf - Rev. E 12/10 EN
Parameter/Condition
Operating 1 bank active precharge current:
t
CS is HIGH between valid commands; Address
inputs are switching every 2 clock cycles; Data
bus inputs are stable
Precharge power-down standby current: All banks idle; CKE is
LOW; CS is HIGH;
are switching; Data bus inputs are stable
Precharge power-down standby current: Clock stopped; All
banks idle; CKE is LOW; CS is HIGH, CK = LOW, CK# = HIGH; Ad-
dress and control inputs are switching; Data bus inputs are stable
Precharge nonpower-down standby current: All banks idle; CKE
= HIGH; CS = HIGH;
are switching; Data bus inputs are stable
Precharge nonpower-down standby current: Clock stopped; All
banks idle; CKE = HIGH; CS = HIGH; CK = LOW, CK# = HIGH; Ad-
dress and control inputs are switching; Data bus inputs are stable
Active power-down standby current: 1 bank active; CKE = LOW;
CS = HIGH;
ing; Data bus inputs are stable
Active power-down standby current: Clock stopped; 1 bank ac-
tive; CKE = LOW; CS = HIGH; CK = LOW; CK# = HIGH; Address
and control inputs are switching; Data bus inputs are stable
Active nonpower-down standby: 1 bank active; CKE = HIGH; CS
= HIGH;
ing; Data bus inputs are stable
Active nonpower-down standby: Clock stopped; 1 bank active;
CKE = HIGH; CS = HIGH; CK = LOW; CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Operating burst read: 1 bank active; BL = 4; CL = 3;
(MIN); Continuous READ bursts; Iout = 0mA; Address inputs are
switching every 2 clock cycles; 50% data changing each burst
Operating burst write: One bank active; BL = 4;
Continuous WRITE bursts; Address inputs are switching; 50% da-
ta changing each burst
Auto refresh: Burst refresh; CKE = HIGH; Ad-
dress and control inputs are switching; Data
bus inputs are stable
Deep power-down current: Address and control pins are stable;
Data bus inputs are stable
RC =
t
RC (MIN);
t
CK =
DD
t
CK =
Specifications and Conditions, –40°C to +85°C (x32)
t
CK (MIN); Address and control inputs are switch-
t
t
CK =
CK (MIN); Address and control inputs are switch-
t
CK =
t
CK =
t
CK (MIN); CKE is HIGH;
t
CK (MIN); Address and control inputs
t
CK (MIN); Address and control inputs
JEDEC-standard
option
JEDEC
reduced page-
size option
t
t
RFC = 138ns
RFC =
t
CK =
t
CK =
t
t
CK (MIN);
REFI
t
CK
26
Electrical Specifications – I
DD
/V
Symbol
DDQ
I
I
I
I
I
I
I
I
I
I
DD2NS
I
DD3NS
DD2PS
DD3PS
DD4W
I
I
DD2N
DD3N
I
DD5A
I
DD2P
DD3P
DD4R
1Gb: x16, x32 Mobile LPDDR SDRAM
DD0
DD0
DD5
DD8
Micron Technology, Inc. reserves the right to change products or specifications without notice.
= 1.70–1.95V
600
600
150
150
100
3.6
3.6
95
80
18
14
20
16
15
10
-5
600
600
145
145
100
-54
3.6
3.6
85
75
17
13
19
15
15
10
Max
600
600
135
135
100
3.6
3.6
© 2009 Micron Technology, Inc. All rights reserved.
75
75
15
18
14
15
10
-6
8
DD
600
600
125
125
100
-75
3.6
3.6
70
70
12
16
12
14
10
8
Parameters
Unit Notes
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
10, 11
7, 13
7, 8
10
6
6
7
9
9
8
6
6
6
6