MT46H64M16LFBF-6 IT:B Micron Technology Inc, MT46H64M16LFBF-6 IT:B Datasheet - Page 96

• Manufacturer Part Number: MT46H64M16LFBF-6 IT:B
• Description: 64MX16 MOBILE DDR SDRAM PLASTIC IND TEMP GREEN VFBGA 1.8V
• Manufacturer: Micron Technology Inc

Specifications of MT46H64M16LFBF-6 IT:B

• Lead Free Status / RoHS Status: Compliant

Figure 53: Self Refresh Mode
Power-Down
PDF: 09005aef83d9bee4
1gb_ddr_mobile_sdram_t68m.pdf - Rev. E 12/10 EN
Command
Address
CKE
DQS
CK#
CK
DM
DQ
1,2
1
Notes:
t
IS
t
IS
t
NOP
RP
T0
Power-down is entered when CKE is registered LOW. If power-down occurs when all
banks are idle, this mode is referred to as precharge power-down; if power-down occurs
when there is a row active in any bank, this mode is referred to as active power-down.
Entering power-down deactivates all input and output buffers, including CK and CK#
and excluding CKE. Exiting power-down requires the device to be at the same voltage as
when it entered power-down and received a stable clock. Note that the power-down
duration is limited by the refresh requirements of the device.
When in power-down, CKE LOW must be maintained at the inputs of the device, while
all other input signals are “Don’t Care.” The power-down state is synchronously exited
when CKE is registered HIGH (in conjunction with a NOP or DESELECT command).
NOP or DESELECT commands must be maintained on the command bus until
satisfied. See Figure 55 (page 98) for a detailed illustration of power-down mode.
4
t
t
IH
IH
t
1. Clock must be stable, cycling within specifications by Ta0, before exiting self refresh mode.
2. CKE must remain LOW to remain in self refresh.
3. AR = AUTO REFRESH.
4. Device must be in the all banks idle state prior to entering self refresh mode.
5. Either a NOP or DESELECT command is required for
CH
t
CL
t
IS
AR
T1
3
Enter self refresh mode
t
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CKE
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96
1Gb: x16, x32 Mobile LPDDR SDRAM
Ta0
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1
t
CK
t
NOP
IS
t
XSR time with at least two clock pulses.
Ta1
Exit self refresh mode
t
XSR
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© 2009 Micron Technology, Inc. All rights reserved.
5
t
IS
Valid
Valid
Tb0
Don’t Care
t
IH
Power-Down
t
XP is