MT46H64M16LFBF-6 IT:B Micron Technology Inc, MT46H64M16LFBF-6 IT:B Datasheet - Page 27

• Manufacturer Part Number: MT46H64M16LFBF-6 IT:B
• Description: 64MX16 MOBILE DDR SDRAM PLASTIC IND TEMP GREEN VFBGA 1.8V
• Manufacturer: Micron Technology Inc

Specifications of MT46H64M16LFBF-6 IT:B

• Lead Free Status / RoHS Status: Compliant

Table 10: I
Notes 1–5 apply to all the parameters/conditions in this table; V
PDF: 09005aef83d9bee4
1gb_ddr_mobile_sdram_t68m.pdf - Rev. E 12/10 EN
Parameter/Condition
Operating 1 bank active precharge current:
=
Address inputs are switching every 2 clock cycles; Data bus in-
puts are stable
Precharge power-down standby current: All banks idle; CKE is
LOW; CS is HIGH;
are switching; Data bus inputs are stable
Precharge power-down standby current: Clock stopped; All
banks idle; CKE is LOW; CS is HIGH; CK = LOW, CK# = HIGH; Ad-
dress and control inputs are switching; Data bus inputs are stable
Precharge nonpower-down standby current: All banks idle;
CKE = HIGH; CS = HIGH;
inputs are switching; Data bus inputs are stable
Precharge nonpower-down standby current: Clock stopped; All
banks idle; CKE = HIGH; CS = HIGH; CK = LOW, CK# = HIGH; Ad-
dress and control inputs are switching; Data bus inputs are stable
Active power-down standby current: 1 bank active; CKE =
LOW; CS = HIGH;
are switching; Data bus inputs are stable
Active power-down standby current: Clock stopped; 1 bank ac-
tive; CKE = LOW; CS = HIGH; CK = LOW; CK# = HIGH; Address
and control inputs are switching; Data bus inputs are stable
Active nonpower-down standby: 1 bank active; CKE = HIGH; CS
= HIGH;
ing; Data bus inputs are stable
Active nonpower-down standby: Clock stopped; 1 bank active;
CKE = HIGH; CS = HIGH; CK = LOW; CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Operating burst read: 1 bank active; BL = 4;
Continuous READ bursts; Iout = 0mA; Address inputs are switch-
ing every 2 clock cycles; 50% data changing each burst
Operating burst write: 1 bank active; BL = 4;
Continuous WRITE bursts; Address inputs are switching; 50% da-
ta changing each burst
Auto refresh: Burst refresh; CKE = HIGH; Ad-
dress and control inputs are switching; Data
bus inputs are stable
Deep power-down current: Address and control balls are sta-
ble; Data bus inputs are stable
t
CK (MIN); CKE is HIGH; CS is HIGH between valid commands;
t
CK =
DD
t
CK (MIN); Address and control inputs are switch-
Specifications and Conditions, –40°C to +105°C (x16)
t
t
CK =
CK =
t
t
CK (MIN); Address and control inputs
CK (MIN); Address and control inputs
t
CK =
t
CK (MIN); Address and control
t
t
RC =
CK =
t
CK =
t
t
RFC = 138ns
RFC =
t
t
RC (MIN);
CK (MIN);
t
CK (MIN);
t
REFI
27
t
CK
Electrical Specifications – I
DD
Symbol
/V
I
I
I
I
I
I
I
I
I
I
DD2NS
I
DD3NS
DD2PS
DD3PS
DD4W
I
DD2N
DD3N
I
DD5A
I
DDQ
DD2P
DD3P
DD4R
DD0
DD5
DD8
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
= 1.70–1.95V
1200
1200
135
135
100
4.6
4.6
95
19
15
21
15
16
15
-5
1200
1200
130
130
100
-54
4.6
4.6
85
18
14
20
15
16
15
Max
1200
1200
120
120
100
4.6
4.6
75
16
19
15
16
15
-6
© 2009 Micron Technology, Inc. All rights reserved.
9
1200
1200
DD
110
110
100
-75
4.6
4.6
70
13
17
13
15
15
9
Parameters
Unit Notes
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
10, 11
7, 13
7, 8
10
6
7
9
9
8
6
6
6
6