C8051F336-GMR Silicon Laboratories Inc, C8051F336-GMR Datasheet - Page 127

Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free

C8051F336-GMR

Manufacturer Part Number
C8051F336-GMR
Description
Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F336-GMR

Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F336DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
10 bit
Package
20QFN
Device Core
8051
Family Name
C8051F336
Maximum Speed
25 MHz
Ram Size
768 Byte
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
 Details

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Part Number:
C8051F336-GMR
0
SFR Definition 20.1. XBR0: Port I/O Crossbar Register 0
SFR Address = 0xE1
Name
Reset
Bit
7:6
Type
5
4
3
2
1
0
Bit
UNUSED Unused. Read = 00b; Write = Don’t Care.
SYSCKE /SYSCLK Output Enable.
SMB0E
CP0AE
URT0E
SPI0E
Name
CP0E
R
7
0
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 unavailable at Port pin.
1: Asynchronous CP0 routed to Port pin.
Comparator0 Output Enable.
0: CP0 unavailable at Port pin.
1: CP0 routed to Port pin.
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pins.
1: SMBus I/O routed to Port pins.
SPI I/O Enable.
0: SPI I/O unavailable at Port pins.
1: SPI I/O routed to Port pins. Note that the SPI can be assigned either 3 or 4 GPIO
pins.
UART I/O Output Enable.
0: UART I/O unavailable at Port pin.
1: UART TX0, RX0 routed to Port pins P0.4 and P0.5.
R
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev.1.0
4
0
Function
SYSCKE
R/W
3
0
C8051F336/7/8/9
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0
127

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